| Chipnemo: Domain-adapted llms for chip design M Liu, TD Ene, R Kirby, C Cheng, N Pinckney, R Liang, J Alben, H Anand, ... arXiv preprint arXiv:2311.00176, 2023 | 146 | 2023 |
| Verilogeval: Evaluating large language models for verilog code generation M Liu, N Pinckney, B Khailany, H Ren 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-8, 2023 | 138 | 2023 |
| A timing engine inspired graph neural network model for pre-routing slack prediction Z Guo, M Liu, J Gu, S Zhang, DZ Pan, Y Lin Proceedings of the 59th ACM/IEEE Design Automation Conference, 1207-1212, 2022 | 91 | 2022 |
| MAGICAL: Toward fully automated analog IC layout leveraging human and machine intelligence B Xu, K Zhu, M Liu, Y Lin, S Li, X Tang, N Sun, DZ Pan 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 88 | 2019 |
| GeniusRoute: A new analog routing paradigm using generative neural network guidance K Zhu, M Liu, Y Lin, B Xu, S Li, X Tang, N Sun, DZ Pan 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 81 | 2019 |
| Exploring logic optimizations with reinforcement learning and graph convolutional network K Zhu, M Liu, H Chen, Z Zhao, DZ Pan Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 145-150, 2020 | 80 | 2020 |
| Towards area-efficient optical neural networks: an FFT-based architecture J Gu, Z Zhao, C Feng, M Liu, RT Chen, DZ Pan 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 476-481, 2020 | 67 | 2020 |
| RTLFixer: Automatically fixing RTL syntax errors with large language model YD Tsai, M Liu, H Ren Proceedings of the 61st ACM/IEEE Design Automation Conference, 1-6, 2024 | 64 | 2024 |
| Towards decrypting the art of analog layout: Placement quality prediction via transfer learning M Liu, K Zhu, J Gu, L Shen, X Tang, N Sun, DZ Pan 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 496-501, 2020 | 60 | 2020 |
| MAGICAL: An open-source fully automated analog IC layout system from netlist to GDSII H Chen, M Liu, B Xu, K Zhu, X Tang, S Li, Y Lin, N Sun, DZ Pan IEEE Design & Test 38 (2), 19-26, 2020 | 58 | 2020 |
| S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity M Liu, W Li, K Zhu, B Xu, Y Lin, L Shen, X Tang, N Sun, DZ Pan 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 193-198, 2020 | 50 | 2020 |
| Delving into effective gradient matching for dataset condensation Z Jiang, J Gu, M Liu, DZ Pan 2023 IEEE International Conference on Omni-layer Intelligent Systems (COINS …, 2023 | 46 | 2023 |
| Universal symmetry constraint extraction for analog and mixed-signal circuits with graph neural networks H Chen, K Zhu, M Liu, X Tang, N Sun, DZ Pan 2021 58th ACM/IEEE Design Automation Conference (DAC), 1243-1248, 2021 | 39 | 2021 |
| Layout symmetry annotation for analog circuits with graph neural networks X Gao, C Deng, M Liu, Z Zhang, DZ Pan, Y Lin Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021 | 39 | 2021 |
| Parasitic-aware analog circuit sizing with graph neural networks and Bayesian optimization M Liu, WJ Turner, GF Kokai, B Khailany, DZ Pan, H Ren 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 38 | 2021 |
| Toward silicon-proven detailed routing for analog and mixed-signal circuits H Chen, K Zhu, M Liu, X Tang, N Sun, DZ Pan Proceedings of the 39th International Conference on Computer-Aided Design, 1-8, 2020 | 37 | 2020 |
| Toward hardware-efficient optical neural networks: Beyond FFT architecture via joint learnability J Gu, Z Zhao, C Feng, Z Ying, M Liu, RT Chen, DZ Pan IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 36 | 2020 |
| Effective analog/mixed-signal circuit placement considering system signal flow K Zhu, H Chen, M Liu, X Tang, N Sun, DZ Pan Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 35 | 2020 |
| SqueezeLight: Towards scalable optical neural networks with multi-operand ring resonators J Gu, C Feng, Z Zhao, Z Ying, M Liu, RT Chen, DZ Pan 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 238-243, 2021 | 34 | 2021 |
| Challenges and opportunities toward fully automated analog layout design H Chen, M Liu, X Tang, K Zhu, N Sun, DZ Pan Journal of Semiconductors 41 (11), 111407, 2020 | 31 | 2020 |
David Z. PanProfessor, Silicon Labs Endowed Chair, ECE Dept., University of Texas at Austinبريد إلكتروني تم التحقق منه على ece.utexas.edu